The present invention relates to an arbitration apparatus for use with a parallel bus, and more particularly to a circuit for arbitrating among units of a parallel bus system conforming to ANSI X3T9.2, which is commonly known as SCSI-II. Each arbitrating unit, in such case, is an enhanced small computer system interfaces as defined by ANSI X3T9.2.
High speed parallel buses which interconnect numerous "intelligent" devices, quite often find two or more of those intelligent devices contending for the common single high speed parallel bus. As a consequence, in high speed parallel bus systems some type of priority and arbitration arrangement is necessary to time share the bus in a predictable and orderly manner. One often used priority method is to assign each device on the common bus a unique priority. The SCSI bus defined by ANSI X3.131-1986, published by the American National Standards Institute, New York, N.Y., uses such an approach.
For a SCSI bus system, each unit is assigned a priority. Usually this priority does not change although it is possible for priorities to be dynamically assigned as long as each resulting priority is unique. According to the SCSI standard mentioned previously, for a fundamental arbitration, there are only as many identification numbers or priorities available for assignment as there are data lines. For a SCSI bus, that means that there are only eight priorities available, since there are only eight data lines. After a bus free cycle, every SCSI bus unit which would like to effect a data transfer in the next data cycle drives or asserts a data line corresponding to its priority. Since there is no central arbitration network, each unit taking part in the arbitration for the next bus cycle must decide for itself whether it lost the previous arbitration, or whether it won the previous arbitration and therefore should prepare to transfer information. Circuits which will arbitrate among eight units for an eight line SCSI bus are known.
A SCSI-II bus may have more than eight lines, for example, it may have sixteen or thirty-two lines. The first problem that a SCSI-II bus system must solve, is the increase of the number of possible assigned priorities from eight to sixteen, or thirty-two. A higher number of priorities means a higher number of inputs to each arbitration circuit. A higher number of inputs usually means a bigger, more complex circuit to arbitrate among the inputs.
A second problem encountered by a SCSI-II bus system is how to keep the more complex arbitration system small, so it may be easily included on LSI/VLSI integrated circuits with other SCSI-II related circuitry.
A third problem encountered by a SCSI-II bus system is how to provide the won/lost arbitration result within the 2.2 microsecond minimum waiting time allotted by the proposed SCSI-II standard mentioned above.
Another problem encountered by a SCSI-II bus system is that it may be desirable to use older SCSI units with an enhanced system. A provision for upward compatibility between SCSI and SCSI-II is very desirable.
It is an object of the present invention to provide an arbitration circuit having at least fifteen inputs for connection to a bus having sixteen or greater data lines.
It is another object of the invention to provide a simple, compact arbitration circuit.
It is another object of the invention to provide an arbitration circuit which will produce an arbitration result from at least sixteen units arbitrating for the bus.
It is a further object of the invention to provide an arbitration circuit which is upward compatible with units designed for eight line SCSI buses.